1. Field of the Invention
The present invention relates to a storage control apparatus, a storage system, a control method of the storage control apparatus, and a channel control unit.
2. Description of the Related Arts
Various devices have hitherto been used to improve the access speed of large-capacity storage devices employing magnetic disks as their storage media. As one of the devices, disposing a cache memory, which uses a semiconductor device as its storage medium, inside a storage control apparatus for controlling accesses to a storage device has been practiced. Thereby, once data has been read out from a magnetic disk, write/read can be carried out to the cache memory. Therefore, the access speed can be improved.
In a conventional storage control apparatus, configuration is such that a channel control unit for controlling input/output to a host computer and a disk control unit for controlling input/output to a storage device are connected via a network, with a cache memory being deployed on the network. The cache memory is often duplicated providing for loss of data.
However, such a configuration can be a factor preventing the improvement of performance because data accesses are concentrated to the cache memory when the scale of the computer system has been expanded and the numbers of host computers connected and magnetic disks in the storage device have been increased.
In order to avoid the above situation, it is effective that the band of the access path to the cache memory is shifted to a higher region. However, in this case, it is necessary to employ high-performance hardware, resulting in increased costs. Furthermore, as the scale of the system becomes larger, an access path of a higher band is necessary.
As a technique for avoiding such a problem, it was proposed that cache memories were deployed in a distributed manner (Refer to Japanese Patent Application Laid-open Publication No. 11-203201 for example).
However, though in the conventional art described above, the concentration of accesses to a cache memory can be alleviated by the distributed deployment of cache memories, paths on a data-path switch compete and this can be a factor for preventing the improvement of the performance of access when a multiplicity of accesses occur simultaneously since the accesses to the cache memories are made through the data-path switch (the network connecting the channel control unit and the disk control unit).
Furthermore, in a configuration wherein a plurality of cache memories are deployed in a distributed manner on the network connecting the channel control unit and the disk control unit, activity ratio of the network is increased and data competition tends to occur on the network since data transfers between the cache memories carried out for duplication and storage of data are carried out through the network.